1. Field of the Invention
The present invention relates to a multilayer substrate with a built-in chip-type electronic component and a method for manufacturing the same.
2. Description of the Related Art
Japanese Unexamined Patent Application Publication No. 2002-084067 discloses a conventional multilayer ceramic substrate and a method for manufacturing the same. In the multilayer ceramic substrate and the method for manufacturing the same disclosed in Japanese Unexamined Patent Application Publication No. 2002-084067, ceramic functional elements, such as a capacitor element, an inductor element, a resistor element, and other functional elements are previously formed using a sintered plate prepared by firing, and each of these functional elements is connected to an internal conductor film and via hole conductor in a green composite laminate. The green composite laminate includes a green substrate layer, a constraining layer including a material which does not sinter at the sintering temperature of the green substrate layer, and a wiring conductor. When the green composite laminate is fired, shrinkage of the green substrate layer in the direction of a main surface is suppressed by the constraining layer. In this technique, firing is performed by a nonshrinkage step using the constraining layer, and thus, the green composite laminate with the built-in functional elements can be fired with no problem while maintaining the characteristics of the functional elements after firing because of no mutual diffusion of the constituents between the functional elements composed of the sintered plate and the green substrate layer.
In the multilayer ceramic substrate disclosed in Japanese Unexamined Patent Application Publication No. 2002-084067, in order to provide the sintered plate in the ceramic multilayer substrate, the sintered plate is bonded to a conductor pattern of an internal conductor film, which is formed on a ceramic green sheet using conductive paste, and then another ceramic green sheet is laminated, followed by pressure-bonding to form a ceramic green laminate.
In the conventional technique disclosed in Japanese Unexamined Patent Application Publication No. 2002-084067, when a positional shift occurs due to poor alignment between the sintered plate and the internal conductor film, thereby causing a slight connection between the sintered plate and the internal conductor film, a defect is likely to occur in a connection to the sintered plate.
On the other hand, when a surface-mounted component is mounted on a surface electrode on a substrate by soldering, self-alignment of the surface-mounted component is caused during reflow, and thus, the above-described problem does not occur. However, when the built-in sintered plate is provided, a self-alignment function is not performed, and thus, a positional shift due to poor alignment of the sintered plate cannot be corrected because the mounting precision is directly reflected. Therefore, when forming the built-in sintered plate, connection reliability cannot be obtained unless a connection part (electrode pad) between the internal conductor film and the sintered plate is larger than a surface electrode on the substrate. In addition, the wiring density is decreased by providing a larger electrode pad on the internal conductor film, thereby failing to decrease the size of the ceramic multilayer substrate.